As is known in the art microchannel bus arbiter circuits are used to connect a peripheral device to a microchannel bus. The arbiter circuit typically includes a bus arbitration logic circuit, a command logic circuit, a decode circuit, and a plurality of programmable option select (POS) registers. The arbiter circuits further include multi functions pins and a plurality of comparators coupled to selected ones of the POS registers and coupled to selected groups of pins of the multi functions pins. The multifunction pins may be provided as read and write signal entry pins and are used to decide whether or not the POS registers can be used internally or externally on these multi-function pins.
It would be desirable, however, to provide output pins for each of the arbitration logic, command logic, and decode circuits the meaning of which could be changed according to the content of the POS registers and the selected mode for enabling, for example, several kinds of memory, such as Random Access Memory (RAM) and Read Only Memory (ROM).